Boolean Logic Project

Objective: Implement all the logic gates presented in the chapter. The only building blocks that you can use are primitive Nand gates and the composite gates that you will gradually build on top of them.

Resources: The only tool that you need for this project is the hardware simulator supplied with the book. All the chips should be implemented in the HDL language specified in appendix A. For each one of the chips mentioned in the chapter, we provide a skeletal .hdl program (text file) with a missing implementation part. In addition, for each chip we provide a .tst script file that tells the hardware simulator how to test it, along with the correct output file that this script should generate, called .cmp or ‘‘compare file.’’ Your job is to complete the missing implementation parts of the supplied .hdl programs.

Contract: When loaded into the hardware simulator, your chip design (modified .hdl program), tested on the supplied .tst file, should produce the outputs listed in the supplied .cmp file. If that is not the case, the simulator will let you know.

Tips: The Nand gate is considered primitive and thus there is no need to build it: Whenever you use Nand in one of your HDL programs, the simulator will auto- matically invoke its built-in tools/builtIn/Nand.hdl implementation. We rec- ommend implementing the other gates in this project in the order in which they appear in the chapter. However, since the builtIn directory features working ver- sions of all the chips described in the book, you can always use these chips without defining them first: The simulator will automatically use their built-in versions.

For example, consider the skeletal Mux.hdl program supplied in this project. Suppose that for one reason or another you did not complete this program’s im- plementation, but you still want to use Mux gates as internal parts in other chip designs. This is not a problem, thanks to the following convention. If our simula- tor fails to find a Mux.hdl file in the current directory, it automatically invokes a built-in Mux implementation, pre-supplied with the simulator’s software. This built- in implementation—a Java class stored in the builtIn directory—has the same in- terface and functionality as those of the Mux gate described in the book. Thus, if you want the simulator to ignore one or more of your chip implementations, simply move the corresponding .hdl files out of the current directory.

Steps: We recommend proceeding in the following order:

  1. The hardware simulator needed for this project is available in the tools directory of the book’s software suite.
  2. Read appendix A, sections A1–A6 only.
  3. Go through the hardware simulator tutorial, parts I, II, and III only.
  4. Build and simulate all the chips specified in the projects/01 directory.
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/**
* And gate:
* out = 1 if (a == 1 and b == 1)
* 0 otherwise
*/

CHIP And {
IN a, b;
OUT out;

PARTS:
// Put your code here:
Nand(a=a,b=b,out=nandout);
Not(in=nandout,out=out);
}
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/**
* 16-bit bitwise And:
* for i = 0..15: out[i] = (a[i] and b[i])
*/

CHIP And16 {
IN a[16], b[16];
OUT out[16];

PARTS:
// Put your code here:
And(a=a[0],b=b[0],out=out[0]);
And(a=a[1],b=b[1],out=out[1]);
And(a=a[2],b=b[2],out=out[2]);
And(a=a[3],b=b[3],out=out[3]);
And(a=a[4],b=b[4],out=out[4]);
And(a=a[5],b=b[5],out=out[5]);
And(a=a[6],b=b[6],out=out[6]);
And(a=a[7],b=b[7],out=out[7]);
And(a=a[8],b=b[8],out=out[8]);
And(a=a[9],b=b[9],out=out[9]);
And(a=a[10],b=b[10],out=out[10]);
And(a=a[11],b=b[11],out=out[11]);
And(a=a[12],b=b[12],out=out[12]);
And(a=a[13],b=b[13],out=out[13]);
And(a=a[14],b=b[14],out=out[14]);
And(a=a[15],b=b[15],out=out[15]);

}
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/**
* Demultiplexor:
* {a, b} = {in, 0} if sel == 0
* {0, in} if sel == 1
*/

CHIP DMux {
IN in, sel;
OUT a, b;

PARTS:
// Put your code here:
And(a=in,b=sel,out=b);
Not(in=sel,out=notsel);
And(a=in,b=notsel,out=a);
}
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/**
* 4-way demultiplexor:
* {a, b, c, d} = {in, 0, 0, 0} if sel == 00
* {0, in, 0, 0} if sel == 01
* {0, 0, in, 0} if sel == 10
* {0, 0, 0, in} if sel == 11
*/

CHIP DMux4Way {
IN in, sel[2];
OUT a, b, c, d;

PARTS:
// Put your code here:
DMux(in=in,sel=sel[1],a=out1,b=out2);
DMux(in=out1,sel=sel[0],a=a,b=b);
DMux(in=out2,sel=sel[0],a=c,b=d);
}
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/**
* 8-way demultiplexor:
* {a, b, c, d, e, f, g, h} = {in, 0, 0, 0, 0, 0, 0, 0} if sel == 000
* {0, in, 0, 0, 0, 0, 0, 0} if sel == 001
* etc.
* {0, 0, 0, 0, 0, 0, 0, in} if sel == 111
*/

CHIP DMux8Way {
IN in, sel[3];
OUT a, b, c, d, e, f, g, h;

PARTS:
// Put your code here:
DMux(in=in,sel=sel[2],a=out1,b=out2);
DMux4Way(in=out1,sel=sel[0..1],a=a,b=b,c=c,d=d);
DMux4Way(in=out2,sel=sel[0..1],a=e,b=f,c=g,d=h);
}
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/** 
* Multiplexor:
* out = a if sel == 0
* b otherwise
*/

CHIP Mux {
IN a, b, sel;
OUT out;

PARTS:
// Put your code here:
Not(in=sel,out=notsel);
And(a=a,b=notsel,out=anotsel);
And(a=b,b=sel,out=bsel);
Or(a=anotsel,b=bsel,out=out);
}
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/**
* 16-bit multiplexor:
* for i = 0..15 out[i] = a[i] if sel == 0
* b[i] if sel == 1
*/

CHIP Mux16 {
IN a[16], b[16], sel;
OUT out[16];

PARTS:
// Put your code here:
Mux(a=a[0],b=b[0],sel=sel,out=out[0]);
Mux(a=a[1],b=b[1],sel=sel,out=out[1]);
Mux(a=a[2],b=b[2],sel=sel,out=out[2]);
Mux(a=a[3],b=b[3],sel=sel,out=out[3]);
Mux(a=a[4],b=b[4],sel=sel,out=out[4]);
Mux(a=a[5],b=b[5],sel=sel,out=out[5]);
Mux(a=a[6],b=b[6],sel=sel,out=out[6]);
Mux(a=a[7],b=b[7],sel=sel,out=out[7]);
Mux(a=a[8],b=b[8],sel=sel,out=out[8]);
Mux(a=a[9],b=b[9],sel=sel,out=out[9]);
Mux(a=a[10],b=b[10],sel=sel,out=out[10]);
Mux(a=a[11],b=b[11],sel=sel,out=out[11]);
Mux(a=a[12],b=b[12],sel=sel,out=out[12]);
Mux(a=a[13],b=b[13],sel=sel,out=out[13]);
Mux(a=a[14],b=b[14],sel=sel,out=out[14]);
Mux(a=a[15],b=b[15],sel=sel,out=out[15]);
}
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/**
* 4-way 16-bit multiplexor:
* out = a if sel == 00
* b if sel == 01
* c if sel == 10
* d if sel == 11
*/

CHIP Mux4Way16 {
IN a[16], b[16], c[16], d[16], sel[2];
OUT out[16];

PARTS:
// Put your code here:
Mux16(a=a,b=b,sel=sel[0],out=out1);
Mux16(a=c,b=d,sel=sel[0],out=out2);
Mux16(a=out1,b=out2,sel=sel[1],out=out);
}
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/**
* 8-way 16-bit multiplexor:
* out = a if sel == 000
* b if sel == 001
* etc.
* h if sel == 111
*/

CHIP Mux8Way16 {
IN a[16], b[16], c[16], d[16],
e[16], f[16], g[16], h[16],
sel[3];
OUT out[16];

PARTS:
// Put your code here:
Mux4Way16(a=a,b=b,c=c,d=d,sel=sel[0..1],out=out1);
Mux4Way16(a=e,b=f,c=g,d=h,sel=sel[0..1],out=out2);
Mux16(a=out1,b=out2,sel=sel[2],out=out);
}
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/**
* Not gate:
* out = not in
*/

CHIP Not {
IN in;
OUT out;

PARTS:
// Put your code here:
Nand(a=in,b=in,out=out);
}
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/**
* 16-bit Not:
* for i=0..15: out[i] = not in[i]
*/

CHIP Not16 {
IN in[16];
OUT out[16];

PARTS:
// Put your code here:
Not(in=in[0],out=out[0]);
Not(in=in[1],out=out[1]);
Not(in=in[2],out=out[2]);
Not(in=in[3],out=out[3]);
Not(in=in[4],out=out[4]);
Not(in=in[5],out=out[5]);
Not(in=in[6],out=out[6]);
Not(in=in[7],out=out[7]);
Not(in=in[8],out=out[8]);
Not(in=in[9],out=out[9]);
Not(in=in[10],out=out[10]);
Not(in=in[11],out=out[11]);
Not(in=in[12],out=out[12]);
Not(in=in[13],out=out[13]);
Not(in=in[14],out=out[14]);
Not(in=in[15],out=out[15]);
}
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/**
* Or gate:
* out = 1 if (a == 1 or b == 1)
* 0 otherwise
*/

CHIP Or {
IN a, b;
OUT out;

PARTS:
// Put your code here:
Nand(a=a,b=a,out=outa);
Nand(a=b,b=b,out=outb);
Nand(a=outa,b=outb,out=out);
}
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/**
* 16-bit bitwise Or:
* for i = 0..15 out[i] = (a[i] or b[i])
*/

CHIP Or16 {
IN a[16], b[16];
OUT out[16];

PARTS:
// Put your code here:
Or(a=a[0],b=b[0],out=out[0]);
Or(a=a[1],b=b[1],out=out[1]);
Or(a=a[2],b=b[2],out=out[2]);
Or(a=a[3],b=b[3],out=out[3]);
Or(a=a[4],b=b[4],out=out[4]);
Or(a=a[5],b=b[5],out=out[5]);
Or(a=a[6],b=b[6],out=out[6]);
Or(a=a[7],b=b[7],out=out[7]);
Or(a=a[8],b=b[8],out=out[8]);
Or(a=a[9],b=b[9],out=out[9]);
Or(a=a[10],b=b[10],out=out[10]);
Or(a=a[11],b=b[11],out=out[11]);
Or(a=a[12],b=b[12],out=out[12]);
Or(a=a[13],b=b[13],out=out[13]);
Or(a=a[14],b=b[14],out=out[14]);
Or(a=a[15],b=b[15],out=out[15]);
}
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/**
* 8-way Or:
* out = (in[0] or in[1] or ... or in[7])
*/

CHIP Or8Way {
IN in[8];
OUT out;

PARTS:
// Put your code here:
Or(a=in[0],b=in[1],out=or1);
Or(a=in[2],b=in[3],out=or2);
Or(a=in[4],b=in[5],out=or3);
Or(a=in[6],b=in[7],out=or4);
Or(a=or1,b=or2,out=or5);
Or(a=or3,b=or4,out=or6);
Or(a=or5,b=or6,out=out);
}
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/**
* Exclusive-or gate:
* out = not (a == b)
*/

CHIP Xor {
IN a, b;
OUT out;

PARTS:
// Put your code here:
Not(in=a,out=nota);
Not(in=b,out=notb);
And(a=nota,b=b,out=t1);
And(a=a,b=notb,out=t2);
Or(a=t1,b=t2,out=out);
}
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